Fixing RAM calculator and reduced actual SRAM usage
- Changed static variables to const that should have been const - Updated CMake files to prepare for MCHCK custom bootloader - Changed the USB ID numbers and ID number for bootloader - Only generate DFU or Teensy binary image, not both - Fixed RAM and FLASH calculator - Added missing license in delay.c/h (much of it was taken from Teensy source though I've changed a bunch of it) - Prepared mk20dx.c for upcoming bootloader addition - mk20dx.h cleanup - Reduced the MCHCK based flash size for the application image (bootloader changes requires more flash space) - Fixed bugs in macro.c - Added keyHold cli command - Added show pending events debug message for PartialMap macro module
This commit is contained in:
Jacob Alexander
parent
2f7e3cb117
commit
eabb1c546a
24 changed files with 418 additions and 110 deletions
48
Lib/mk20dx.h
48
Lib/mk20dx.h
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@ -1,6 +1,7 @@
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/* Teensyduino Core Library
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* http://www.pjrc.com/teensy/
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* Copyright (c) 2013 PJRC.COM, LLC.
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* Modified by Jacob Alexander 2014
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files (the
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@ -31,12 +32,7 @@
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#ifndef _mk20dx_h_
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#define _mk20dx_h_
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//#define F_CPU 96000000
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//#define F_CPU 48000000
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//#define F_CPU 24000000
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//#define F_BUS 48000000
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//#define F_BUS 24000000
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//#define F_MEM 24000000
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// ----- Defines -----
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#if (F_CPU == 96000000)
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#define F_BUS 48000000
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@ -54,8 +50,16 @@
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#define NULL ((void *)0)
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#endif
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// ----- Includes -----
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#include <stdint.h>
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// ----- Registers -----
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// chapter 11: Port control and interrupts (PORT)
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#define PORT_PCR_ISF (uint32_t)0x01000000 // Interrupt Status Flag
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#define PORT_PCR_IRQC(n) (uint32_t)(((n) & 15) << 16) // Interrupt Configuration
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@ -249,7 +253,7 @@
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#define SIM_SOPT1 *(volatile uint32_t *)0x40047000 // System Options Register 1
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#define SIM_SOPT1CFG *(volatile uint32_t *)0x40047004 // SOPT1 Configuration Register
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#define SIM_SOPT2 *(volatile uint32_t *)0x40048004 // System Options Register 2
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#define SIM_SOPT2_USBSRC (uint32_t)0x00040000 // 0=USB_CLKIN, 1=FFL/PLL
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#define SIM_SOPT2_USBSRC (uint32_t)0x00040000 // 0=USB_CLKIN, 1=FFL/PLL
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#define SIM_SOPT2_PLLFLLSEL (uint32_t)0x00010000 // 0=FLL, 1=PLL
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#define SIM_SOPT2_TRACECLKSEL (uint32_t)0x00001000 // 0=MCGOUTCLK, 1=CPU
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#define SIM_SOPT2_PTD7PAD (uint32_t)0x00000800 // 0=normal, 1=double drive PTD7
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@ -703,7 +707,7 @@
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#define MCG_C2 *(volatile uint8_t *)0x40064001 // MCG Control 2 Register
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#define MCG_C2_IRCS (uint8_t)0x01 // Internal Reference Clock Select, Selects between the fast or slow internal reference clock source.
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#define MCG_C2_LP (uint8_t)0x02 // Low Power Select, Controls whether the FLL or PLL is disabled in BLPI and BLPE modes.
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#define MCG_C2_EREFS (uint8_t)0x04 // External Reference Select, Selects the source for the external reference clock.
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#define MCG_C2_EREFS (uint8_t)0x04 // External Reference Select, Selects the source for the external reference clock.
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#define MCG_C2_HGO0 (uint8_t)0x08 // High Gain Oscillator Select, Controls the crystal oscillator mode of operation
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#define MCG_C2_RANGE0(n) (uint8_t)(((n) & 0x03) << 4) // Frequency Range Select, Selects the frequency range for the crystal oscillator
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#define MCG_C2_LOCRE0 (uint8_t)0x80 // Loss of Clock Reset Enable, Determines whether an interrupt or a reset request is made following a loss of OSC0
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@ -721,7 +725,7 @@
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#define MCG_C6 *(volatile uint8_t *)0x40064005 // MCG Control 6 Register
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#define MCG_C6_VDIV0(n) (uint8_t)((n) & 0x1F) // VCO 0 Divider
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#define MCG_C6_CME0 (uint8_t)0x20 // Clock Monitor Enable
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#define MCG_C6_PLLS (uint8_t)0x40 // PLL Select, Controls whether the PLL or FLL output is selected as the MCG source when CLKS[1:0]=00.
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#define MCG_C6_PLLS (uint8_t)0x40 // PLL Select, Controls whether the PLL or FLL output is selected as the MCG source when CLKS[1:0]=00.
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#define MCG_C6_LOLIE0 (uint8_t)0x80 // Loss of Lock Interrrupt Enable
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#define MCG_S *(volatile uint8_t *)0x40064006 // MCG Status Register
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#define MCG_S_IRCST (uint8_t)0x01 // Internal Reference Clock Status
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@ -1960,8 +1964,32 @@ typedef struct {
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// Other
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#define VBAT *(volatile uint8_t *)0x4003E000 // Register available in all power states
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// ----- Macros -----
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#define SOFTWARE_RESET() SCB_AIRCR = 0x5FA0004
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// ----- Variables -----
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extern const uint8_t sys_reset_to_loader_magic[22];
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// ----- Functions -----
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void *memset( void *addr, int val, unsigned int len );
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void *memcpy( void *dst, const void *src, unsigned int len );
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int memcmp( const void *a, const void *b, unsigned int len );
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extern int nvic_execution_priority(void);
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// ----- Interrupts -----
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extern void nmi_isr(void);
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extern void hard_fault_isr(void);
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extern void memmanage_fault_isr(void);
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@ -2053,7 +2081,5 @@ extern void portd_isr(void);
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extern void porte_isr(void);
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extern void software_isr(void);
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#define SOFTWARE_RESET() SCB_AIRCR = 0x5FA0004
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#endif
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